Cadence and the Indian Institute of Technology Delhi (IIT Delhi) have joined forces to establish the IIT Delhi–Cadence Innovation Lab, a multidisciplinary centre designed to nurture the next generation of semiconductor professionals in India. The facility will provide students, researchers and emerging startups with access to advanced AI-powered electronic design automation (EDA) technologies and industry-standard workflows. The initiative aims to accelerate semiconductor research, strengthen talent development and support early-stage innovation, in line with the objectives of the India Semiconductor Mission and the Design-Linked Incentive (DLI) scheme.
The Innovation Lab will offer access to more than 200 Cadence software solutions spanning key areas such as chip verification, digital design implementation, analog design, and system analysis. By enabling hands-on experience with the same tools used across the semiconductor industry, the lab seeks to bridge the gap between academia and industry. It will also integrate AI-driven design methodologies into semiconductor engineering workflows, helping improve productivity while advancing the adoption of AI in VLSI and chip design.
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As part of the collaboration, IIT Delhi has integrated Cadence-designed courses into its academic curriculum, combining classroom instruction with project-driven laboratory sessions and practical assessments. The approach emphasizes experiential learning by enabling students to work on real-world design challenges using industry-standard tools. In addition, guest lectures and interactions with Cadence professionals and industry experts will help students stay aligned with emerging technology trends and evolving career opportunities in the semiconductor sector.
To further encourage research and innovation, the Innovation Lab will offer an Early Master’s Research pathway for selected fourth-year students from IITs and NITs. Participants will receive guidance from both Cadence specialists and IIT Delhi faculty members across diverse research disciplines. The lab will also support promising pre-seed startups through its incubation programme, providing access to resources and a cost-effective pathway for developing prototypes and progressing toward initial chip tape-outs.
“Students at IIT Delhi now use the same AI‑enabled tools they’ll see on day one in industry, closing the gap from classroom to tapeout,” said Alok Jain, Corporate VP and India Managing Director, Cadence. “Pairing industry‑grade technology with project‑based curricula, real‑world challenges and targeted startup support strengthens research relevance and workforce readiness for India’s semiconductor future.”
“The IIT Delhi–Cadence Innovation Lab combines top‑tier academic rigour with cutting‑edge industry tools,” said Prof. Jayadeva, Prof. In-Charge, Cadence-IIT Delhi Innovation Lab. “This partnership will expand research output, prepare students for high‑impact careers and help founders move from ideas to prototypes, supporting the goals of the India Semiconductor Mission and the DLI scheme.”
Looking ahead, the Lab is committed to significantly increasing research output, graduating talent ready to contribute on day one, and cementing high‑impact collaborations that translate academic innovation into industrial outcomes.
